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Description: DES 加密算法的VHDL和VERILOG 源程序及其TESTBENCH。
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Size: 30494 |
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Description: des-soft.com/download/soft/3894.htm - 12k - 网页快照 - 类似网页
- 以Verilog 描述DES 加密算法(电子书)[ 繁体 ]
... CISCO 的fireware, router , SONY 的PS2 的都一再的证明了这个事实. 现在, 我们
就以著名的网络安全加密算法DES 为例子, 来看看如何用Verilog 来表达... ... Re:
以Verilog 描述DES 加密算法(电子书) 由Anonymous 发表于2002/08/29,Thu @15:46:38 ...
www.icdiy.org/article.php3?sid=18 - 19k - 网页快照 - 类似网页
-des-soft.com/download/soft/3894.htm - 12k-web snapshot-like web-to Verilog description DES encryption algorithm (e-books) [traditional] ... the fireware CISCO, router, Sony's PS2 has repeatedly proved the this fact. now, we have a well-known network security DES encryption algorithm for example, to see how to use Verilog expression ... ... Re : Verilog description DES encryption algorithm (e-books) from Anonymous on 2002/08/29, Thu @ 15 : 46-38 ... www.icdiy.org/article.php3 sid = 18-19k-web snapshot-like web
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Size: 8390 |
Author: le |
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Description: 一个关于DES算法的verilog语言实现,包括了各个实现模块以及测试模块-a DES algorithm on the Verilog language, including the realization of the various modules and test modules
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Size: 17534 |
Author: xkl |
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Description: DES encryption for verilog program
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Size: 9812 |
Author: socketa |
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Description: this DES made by verilog
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Size: 15833 |
Author: Shawn |
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Description: 包中包括,
DW8051完整的Verilog HDL代码
两本手册:
DesignWare Library DW8051 MacroCell, Datasheet
DesignWare DW8051 MacroCell Databook
三篇51论文:
基于IP 核的PSTN 短消息终端SoC 软硬件协同设计
Embedded TCP/ IP Chip Based on DW8051 Core
以8051为核的SOC中的万年历的设计 -DW8051 is designed by synopsys, and its instruction cycle is 4 clock, which lead to about 3 times faster than Intel 8051 with the same oscillator frequency. I writed ram, rom, some other perpherals such as DES, RNG, and its testbench, and it worked all right!
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Size: 1588224 |
Author: myfingerhurt |
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Description: 实现变量移位操作的32-bit桶形移位寄存器;实现DES算法的数据路径设计及控制路径设计,有仿真和附录verilog代码
-Variable shift operations to achieve 32-bit barrel shifter implement the DES algorithm data path and control path design design
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Size: 33792 |
Author: BOBO |
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Description: verilog 实现的3DES 和 DES 加解密算法,3DES目前还未被破解。-verilog implementation of 3DES and DES encryption and decryption algorithm, 3DES has yet to be cracked.
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Size: 6144 |
Author: 李阳 |
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Description: this DES encryption and decryption code in verilog-this is DES encryption and decryption code in verilog
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Size: 961536 |
Author: neha |
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Description: a triple-DES (Data Encryption Standard) hardware description in verilog-HDL with testbench
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Size: 861184 |
Author: Farzad |
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Description: 用Verilog语言描述的des的s盒(des s盒 Verilog代码) -Verilog language description des s box (des s box Verilog code)
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Size: 9216 |
Author: shilei |
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Description: 用FPGA实现的DES和3DES算法,使用开发板DE2-115通过验证-EDS&3DES based on ALTERA-FPGA,realized by Verilog HDL and DE2-115board.
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Size: 20877312 |
Author: 李刚 |
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Description: Encrypt and decrypt DES algorithm in verilog
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Size: 8192 |
Author: hr |
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Description: DES Encoder and Decoder Verilog RTL Code
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Size: 37888 |
Author: richman |
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Description: Triple DES 密码算法。
利用Xillinx公司的Virtex-II芯片测试了。正常动作。-Triple DES core implementation in verilog. It takes three standard 56 bit keys and 64 bits of data as input and generates a 64 bit encrypted/decrypted result.
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Size: 70656 |
Author: 金铁男 |
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Description: It s DES codes which is written by verilog.
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Size: 12288 |
Author: bdse98 |
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Description: verilog语言书写的的des加密解密代码-verilog of des encryption and decryption
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Size: 8192 |
Author: 胡杰 |
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Description: verilog实现des的加密解密源代码-verilog realization of des encryption and decryption source code
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Size: 8192 |
Author: zhou |
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Description: 具有所有的DES等加密解密运算操作实现,加密,解密等运算-verilog DES encrypt
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Size: 3072 |
Author: 翟江涛 |
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Description: 基于Quartus ii 平台的DES加密算法Verilog设计和modelsim仿真(DES encryption algorithm design and Modelsim simulation based on Quartus II platform)
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Size: 792576 |
Author: xuan3731
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